The present disclosures relate to audio/video electronics and communications, and more particularly, to an RF carrier generator and method for RF carrier generation for use with the audio/video electronics and communications.
Traditional analog carrier generators require precision phase-lock loops (PLLs) and voltage controlled oscillators (VCOs) to synthesize carriers with the frequency accuracy and stability necessary to comply with TV standards. PLL loop filters must be carefully designed to minimize jitter. Furthermore, in the event of process changes, analog blocks often require redesign.
In another approach, Digital Direct Synthesis (DDS) techniques can be applied to audio/video RF carrier generation; however, a corresponding performance and maximum synthesizable frequency of such a generator are limited by a digital-to-analog converter (DAC) performance. Additionally, DACs require a considerable area of an IC chip and need redesign when ported to other integrated circuit technologies. Furthermore, more hardware efficient bandpass Sigma-Delta DACs are unsuitable for use in replacing traditional DACs, because the order would be too high (e.g. greater than twenty (>20)) and a speed of the corresponding digital circuitry would not be adequate to generate RF carriers. The high order would be necessary to generate a noise notch wide enough to allow a realizable analog reconstruction filter.
Another technique to generate analog high-precision sine waves involves using a Sigma-Delta oscillator. Sigma-Delta oscillators are digital resonators containing a 1-bit Sigma-Delta DAC in a loop, and thus can directly generate a 1-bit signal. The frequency is selected by changing the gain of a feed-back loop. All blocks are digital except for a Sigma-Delta output buffer. However for the application of audio/video RF carriers, high-order bandpass Sigma-Delta modulators are required. Since the same considerations made above for the bandpass Sigma-Delta modulators for DDS apply to this case too, Sigma-Delta oscillators are not practical for generating RF carriers.
Even though a Digital Direct Synthesis generator with bandpass Sigma-Delta modulator or a Sigma-Delta oscillator cannot run in real time to generate RF carriers, the circuit can be simulated on a computer and the outputs can be stored into a memory. Another technique consists in using generators with such Sigma-Delta samples stored in a memory. However, such generators target built-in self tests (BIST) for ICs and do not meet performance requirements for most applications other than the built-in self tests.
FIG. 1 is a schematic block diagram view of a carrier generator 10 using a pre-recorded Sigma-Delta modulator sequence or bit stream. RF carrier generator 10 includes a digital Sigma- Delta sequence generator 12 and an analog filter 14. Digital Sigma-Delta sequence generator receives a clock signal at input 16 and includes a counter 18 and memory or look-up table (LUT) 20. Responsive to an output from counter 18, the memory or LUT 20 outputs, sequentially, a bit stream of single bits on output 22 of the digital Sigma-Delta generator 12. Responsive to an input (corresponding to the output 22 of the digital Sigma-Delta generator 12), analog filter 14 provides an RF carrier signal on output 24.
With the carrier generator 10 of FIG. 1, a desired Sigma-Delta sequence bit stream is first generated (i.e., by some means such as Digital Direct Synthesis generators or Sigma-Delta oscillators not running in real time or by computer simulations) and then stored as a sequence in a circular memory or lookup table. Generating the bit stream then comprises reading out the entire sequence and repeating the reading out over and over. In addition, the carrier generator 10 of FIG. 1 is completely digital with the exception of the output buffer or analog filter 14. Furthermore, the carrier generator 10 does not require any precision components, only a stable and accurate clock source. As stated above, such generators as shown in FIG. 1 are as described in the literature; however, they are for built-in self test (BIST) applications for mixed-signal integrated circuits (ICs). Furthermore, such generators, with practical sizes of look-up tables, do not meet performance requirements for most applications other than the BIST applications. In fact, by increasing the look-up table size the performance could be met. However, (i) the hardware complexity could become too high and/or (ii) the look-up table could no longer be read at the appropriate speed needed to generate the RF carrier.
Accordingly, there is a need for an improved method and apparatus for overcoming the problems in the art as discussed above.
The use of the same reference symbols in different drawings indicates similar or identical items. Skilled artisans will also appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help improve the understanding of the embodiments of the present invention.